Flip Chip packaging, in which the silicon die is directly attached to the substrate using solder bumps instead of wirebonds, provides a dense interconnect with high electrical and thermal performance. Flip Chip interconnection provides the ultimate in miniaturization, reduced package parasitics and enables new paradigms in power and ground distribution to the chip not feasible in other traditional packaging approaches. 

JCET offers a broad Flip Chip portfolio--from large single die packages with passive components to modules and complex advanced 3D packaging, with a variety of low cost and innovative options.