New JCET 12 Inch Wafer Bumping Line in Advanced Flip Chip South Korea Factory Ramps into High Volume


Incheon, South Korea – July 29, 2019 – Jiangsu Changjiang Electronics Technology Co., Ltd (‘JCET’) has moved into volume production with its new 12 inch wafer bumping line which is located in Class 100 and Class 1000 clean room space in its state of the art assembly and test facility in Incheon, South Korea. Production volumes are already being shipped to JCET customers with several additional leading industry device manufacturers qualifying the line for shipments over the next few quarters.

Automotive, wireless, computing and other devices have already been qualified on this new bumping line which has now become an integral part of JCETs advanced flip chip packaging offerings in Korea. The line currently offers both lead free and copper column bump types with bump pitches as tight as 90um and down to 40um possible.

“We are proud to offer an additional source for bumping within the JCET group of factories” stated JCET CEO, Dr. Choon Heung Lee. “The demand for bumping services as part of a full turnkey assembly and test solution continues to grow exponentially and this new line enables us to provide this value added service at two of our regional manufacturing hubs,” continued Dr. Lee.

JCET’s campus in South Korea opened in 2015 and is a short drive from Incheon International Airport. This campus’ manufacturing facilities provide assembly and test of Flip Chip, Package-on-Package (PoP), Wafer-Level and Advanced System-in-Package solutions. JCET is the largest OSAT in China and the third largest in the world with factories in China, South Korea and Singapore.

Forward-Looking Statements

Certain of the statements in this release, including statements regarding the Company’s intellectual property, are forward-looking statements that are based on management’s current views and assumptions and involve a number of risks and uncertainties which could cause actual events or results to differ materially from those described in this release. Factors that could cause actual results to differ include, but are not limited to, general business and economic conditions and the state of the semiconductor industry; prevailing market conditions; demand for end-use applications products such as communications equipment, consumer and multi applications and personal computers; decisions by customers to discontinue outsourcing of test and packaging services; level of competition; our reliance on a small group of principal customers; our continued success in technological innovations; pricing pressures, including declines in average selling prices; intellectual property rights disputes and litigation; our ability to control operating expenses; our substantial level of indebtedness and access to credit markets; potential impairment charges; availability of financing; changes in our product mix; our capacity utilization; delays in acquiring or installing new equipment; limitations imposed by our financing arrangements which may limit our ability to maintain and grow our business; returns from research and development investments; changes in customer order patterns; customer credit risks; disruption of our operations; shortages in supply of key components and disruption in supply chains; disruption of our operations and other difficulties related to the relocation of our China operations; loss of directors, key management or other personnel; defects or malfunctions in our testing equipment or packages; rescheduling or canceling of customer orders; adverse tax and other financial consequences if the taxing authorities do not agree with our interpretation of the applicable tax laws; our ability to develop and protect our intellectual property; changes in environmental laws and regulations; exchange rate fluctuations; regulatory approvals for further investments in our subsidiaries; beneficial ownership by Jiangsu Changjiang Electronics Technology Co., Ltd. (“JCET”) of all of our ordinary shares that may result in conflicting interests with other holders of our securities; our inability to capture all or any of the benefits from acquisitions and investments in other companies and businesses or from the acquisition of us in August 2015 by JCET-SC (Singapore) Pte, Ltd., which is now wholly-owned by JCET; loss of customers or failure to compete effectively with our former Taiwan subsidiaries which we have divested in 2015; labor union problems in South Korea; uncertainties of conducting business in China and changes in laws, currency policy and political instability in other countries in Asia; natural calamities and disasters, including outbreaks of epidemics and communicable diseases; and other risks. All our forward looking statements are expressly qualified in their entirety by the cautionary statements set forth above. You should not unduly rely on such forward-looking statements, which speak only as of the date of this release. JCET does not intend, and does not assume any obligation to update any industry information or forward-looking statements to reflect subsequent events or circumstances. In light of these risks, uncertainties and assumptions, any of the events anticipated in these forward-looking statements might not occur.

About JCET

Founded in 1972, Jiangsu Changjiang Electronics Technology Co., Ltd. (“JCET”) is one of the top semiconductor packaging and test providers in the world and the largest provider in China. With full turnkey services encompassing design and characterization, wafer bump, packaging and test, JCET is a strategic partner for semiconductor companies across a broad range of markets and applications. The comprehensive packaging portfolio of JCET and its subsidiaries include discrete, leaded, laminate, flip chip, Molded Interconnect System, wafer level packaging and System-in-Package technologies. Headquartered in Jiangyin, Jiangsu, China, JCET has an extensive global manufacturing base with operations in China, Singapore and South Korea. JCET is a publicly-traded company that is listed on the Shanghai Stock Exchange. Further information is available at

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